Call for Papers

IEEE Conference Proceedings and Journal Papers

The accepted papers from this conference will be submitted for publication in IEEE Xplore as well as other Abstracting and Indexing (A&I) databases (EI Compendex). Distinguished papers, after further revisions, will be considered for possible publication in several SCI & EI indexed special issues of prestigious international journals. By submitting a paper to the conference, authors assure  that if the paper is accepted, at least one author will attend the conference and present the paper.

Papers should be written in English conforming to the IEEE conference proceedings format (8.5" x 11", Two-Column). Papers should be submitted through the paper submission system at the conference website. Full Papers (up to 8 pages, or 12 pages with the over length charge) and Short Papers (up to 4 pages) are solicited.  See Instructions for authors.

Scope and Interests

Topics of particular interests include the following tracks, but are not limited to:

1. Parallel and distributed system architectures

2. Languages and compilers for high performance computing

3. Parallel and distributed software technologies

4. Parallel and distributed algorithms

5. Embedded systems

6. Peer-to-peer computing

7. Grid and cluster computing

8. Web services and Internet computing

9. Cloud computing

10. Utility computing

11. Performance evaluation and measurement

12. Tools and environments for software development

13. Distributed systems and applications

14. High-performance scientific and engineering computing

15. Database applications and data mining

16. Biological/molecular computing

17. Collaborative and cooperative environments

18. Mobile computing and wireless communications

19. Computer Networks

20. Telecommunications

21. Pervasive/ubiquitous computing and intelligence

22. Autonomic, reliability and fault-tolerance

23. Trust, security and privacy



(in conjuction): The 6th International Symposium on Advances of High Performance Computing and Networking

The AHPCN-2014 Symposium consists of invited papers in the field of high performance

computing and networking. The goal of AHPCN-2014 is to provide an additional forum within

HPCC-2014 for interaction among researchers and further discussion on the HPCC topics:

  • Parallel and distributed system architectures
  • Parallel and distributed software technologies
  • Parallel and distributed algorithms
  • Embedded systems
  • Grid, cluster and peer-to-peer computing
  • Web services and internet computing
  • Performance evaluation and measurement
  • Distributed systems and applications
  • High-performance scientific and engineering computing
  • Database applications and data mining
  • Biological/molecular computing
  • Mobile computing and wireless communications
  • Network protocols, routing, algorithms
  • Pervasive/ubiquitous computing and intelligence
  • Autonomic, reliability and fault-tolerance
  • Trust, security and privacy

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(in conjuction): The 6th IEEE International Workshop on Multicore and Multithreaded Architectures and Algorithms (M2A2 2014)

Multicore  systems  are  dominating  the  processor  market  ranging  from  embedded  to  high-performance
systems. Currently some processors integrate more than ten cores and, as the node shrinks in future
technology  generations,  it  is  expected  that  the  number  of  cores  will  continue  increasing  in  future
manufactured systems.
To  take  advantage  of  the  high  number  of  cores  efficient  load  balancing  and  scheduling  policies  or
strategies  are  required.  In  addition,  it  remains  a  challenge  to  identify  and  productively  program
applications for these systems with a resulting substantial performance improvement.
On the other hand, the system designer must trade off performance versus power consumption, which is
a major concern in current microprocessors. Therefore, current design must focus on new architectures
or architectural mechanisms addressing this tradeoff.
Finally, most real-time embedded applications are requiring high-performance computing and multicore
and multithreaded processors are becoming the typical design choice.
The  aim  of  this  workshop  is  to  provide  a forum  for  engineers  and  scientists  to  address  the  resulting
challenge  and  to  present  new  ideas,  applications,  and  experience  on  all  aspects  of  multicore  and
multithreaded systems.
Authors are invited to submit high quality papers representing their original work in (but not limited to)
the following topics targeting multicore multithreaded processors:

  • Multicore and multithreaded architectures
  • Power-aware multicore architectures and computing
  • Embedded multicore real-time systems
  • Scheduling and load balancing
  • Multicore programming
  • Parallel and distributed algorithms

Paper Submission and Publication
Submit original unpublished papers in PDF or Ms-Word formats at the submission system: All submitted manuscripts will be reviewed at
least by three expert reviewers. Submissions will be judged on originality, technical strength, quality of
presentation, and relevance to the workshop scope.
All accepted papers will be included in the HPCC 2014 workshop proceedings published by IEEE Computer Society, and content will be submitted to the indexing companies for possible indexing.  The length  of  the  camera-ready  manuscripts  will  be  limited  to  8
pages in IEEE CS proceedings paper format. Authors of accepted papers, or at least one of them, are
requested  to  register  and present  their  work  at  the  conference,  otherwise  their  papers  will  not  be

Distinguished  papers  accepted  and  presented  in  M2A2  2014,  after  further  revisions,  could  be
considered for publication in special issues of SCI indexed international journals.

Important Dates
May 23, 2013: Paper Submission Due
June 23, 2013: Notification of Acceptance/Rejection
July 15, 2013: Camera-Ready Due
August 20-22, 2013: Workshop Takes Place

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